A 0 . 2 V 0 . 44 μ W 20 kHz Analog to Digital Modulator with 57 fJ / conversion
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چکیده
This paper presents a 90 nm CMOS Σ∆ A/D modulator operating with a supply voltage of 0.2V, well below the threshold voltage of the transistors. The modulator is an open-loop first-order architecture based on a frequencymodulated intermediate signal, generated in a ring voltagecontrolled oscillator. The linearity of the modulator is greatly improved by the adoption of a so-called soft-rail in the oscillator. Measurements show a dynamic range of 52 dB over a 20 kHz signal bandwidth with a sampling frequency of 3.4MHz, for a total power consumption as low as 0.44μW. The corresponding peak SNDR is 44.2 dB, while the peak SNR is 47.4 dB.
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تاریخ انتشار 2017